claimroutineinferred_dep
Clause decoder has linear-size circuit
Statement (paper)
For all sufficiently large , a Boolean circuit of fan-in-two gates computing the clause decoder of , which maps each clause index in to the three variable labels and their signs, can be constructed in time polynomial in (that is, polynomial in the input length after unary encoding of is not required).
In plain English
For all large , the clause decoder of , which maps a clause index in to its three variable labels and signs, is computed by a fan-in-two circuit with gates, and this circuit can be built in time polynomial in .
Why it's here
The previous claim gives the decoder only as a polynomial-time computable map on index bits. This claim turns it into an explicit circuit of size , which is the size bound needed to compare against circuits for the witness language. Later claims use this circuit to get a nondeterministic algorithm for from small witness circuits.
Classified routine:
This follows from the local reduction of Jahanjou–Miles–Viola [JMV13], whose clause decoder is computed by quasi-linear (here linear) size circuits. It is a direct consequence of the previous claim plus the standard circuit-size bound for that reduction.
Uses
Used by
Sources
PaperOpen
- Section
- §1 Introduction
- Page
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- Label
—- Line
quantitative-circuits.tex:18
Leannot aligned
Phase 2 aligns this node to a Lean declaration.
Friction
- infoinferred_depoutline: "Clause decoder as linear-size circuit" rests on claim-cor-quantitative-circuits-1